The invention relates to the field of microfabrication and nanofabrication processing and, in particular, to multilevel processing.
Multilevel processing has become a requirement for almost all microfabricated and nanofabricated devices. Multilevel processing relates to the formation of a plurality of lithographic layers. It generally involves successive material deposition, aligned lithography, etching, and planarization steps. Each lithographic layer requires a separate material deposition step, which has to be immediately followed by lithography, patterning, and planarization. These steps are then repeated for each lithographic layer until the desired microstructure is formed. This standard multilevel process has several drawbacks that will now be considered.
First, planarization is problematic as it is typically the yield-limiting step. In addition, it is costly and may generate particles that can never be completely removed. Second, all the abovementioned fabrication steps have different contamination requirements. If one keeps alternating from one type of process to the next, all the processes have to reach the cleanliness standard of the most demanding step, typically material deposition. In some cases, this may be impossible to achieve so the application of the standard multilevel fabrication technique may be prohibited entirely. Finally, the number of fabrication steps is high and contributes to making the process costly.